Hardware Design and Development Services for Embedded Electronics Systems
Embedded Hardware design development services include Hardware Architecture, Component Selection, Schematic board design, Analog Hardware Design, Digital Hardware Design, High Power Hardware Design, High Speed PCB layout, Schematic PSPICE Simulations, Failure, WCCA and Reliability Analysis , Wireless RF PCB layout, board design, integrating FPGAs, DSPs, microprocessors, and complex RF, analog, and power systems to realize the complete embedded hardware design and development for a given application.
Embedded Hardware Architecture and Schematic Design Services
VerveTronics hardware design team is capable of developing Board Solutions from a simple conceptual block diagram to Temperature, Environment, EMI/EMC certifiable,cost optimizedand tested to extensive test suite to validate the requirement of the project. We have expertise in following system designs.
- ARM & DSP, 32/64bit Micro-Controller/ Micro-Processor based systems
- FPGA/CPLD plus embedded controller based boards
- Ruggedized and Conduction cooled boards
- Mixed Signal, High speed system design
- Component Selection & BOM Optimisation
- Simulation (LTSPICE, PSPICE, PTC Mathcad)
- Power Management (Low, medium and high voltage applications)
- Reliability WCCA, MTBF Analysis
- Interfaces System design for :-
a. Communication (USB, Ethernet, CAN, Bluetooth, Wi-Fi, PCIe)
b. Multimedia, (Audio, Video, Camera)
c. Serial, (UART, SPI, I2C, RS485, RS422)
d. HMI/UI (LCD, LVDS, HDMI, DVI, Keypad)
e. GPIO, A/D, D/A, and analog
f. Storage: SSD, SATA, Flash, SDRAM, SD/MMC
Embedded Hardware Development Tools and Technologies
- Schematic Design (OrcadCapture, Mentor Graphics)
- Simulation (LTSPICE, PSPICE, PTC Mathcad)
- PCB Design (Orcad Allegro, Mentor Graphics Pads)
- Gerber(CAM360)
- Signal Integrity (Mentor Graphics, Hyper lynx )
- Thermal Analysis (Mentor Graphics, Hyper lynx)
- Power Integrity Analysis (Mentor Graphics, Hyper lynx)
- Platform Architectures (FPGA, DSP, Microcontrollers, ARM , ASICs, CPLDs)
- Process Gap Analysis, Audits & Improvements
- Compliance to safety and quality standards and assistance in certifications
Hardware PCB Board Design, Layout and Gerbers
- PCB Designs for space, military, medical and commercial applications
- Extensive RF and analog design experience (printed antennas, guard rings, RF shields…)
- PCB Layer management for signal integrity and impedance control
- DDR, DDR2, DDR3, SAS and differential pair routing expertise
- High density SMT designs (BGA, uBGA, PCI, PCIE, CPCI…)
- Flex PCB designs of all types
- Low level analog PCB designs for metering
- Ultra low EMI designs for MRI applications
- Complete assembly drawings
- In-Circuit Test data generation (ICT)
- Drill, panel and cut-out drawings designed
- Professional fabrication documents created
- Mixed speed and signal technology
- High-speed digital and analog
- Low EMI/RFI design
- μBGA, fine pitch, microVia PCB technology
- High-density, multi-layer (12+), small form factor PCB
- Multi-board system level simulation
Design for Manufacturability, Production & Testability
- Design for high volume
- Low cost design
- Production Test: electrical, functional, boundary scan
- Bed of nails design
- Component Obsolescence
- Functional Simulations for Failure Modes and Effects
- Safety Verification and Validation Tools and Techniques.
- Hardware Tool Qualifications with TCL Analysis
- Hardware V&V Gap Analysis & Improvements: Traceability, Static Analysis, Dynamic Analysis, Test Plans & Coverage
Hardware Design Power Integrity Analysis Services
- Power Planes, Spit Planes,
- VI Potential drop analysis
- Noise Analysis
- Decoupling design involving capacitor placement and selection (dielectric types, body sizes and values)
- Design of Pi filters to create quiet power for PLL/DLL/Clock oscillator circuits, and the Design and analysis of power islands/power splits.
Hardware Design Signal Integrity Analysis Services
Signal integrity engineering is the task of analysing and mitigating these effects. VerveTronics hardware design team is capable of:
- High Speed Signals/Circuit Simulations
- Simulation using Spice and IBIS Models
- Signal integrity issues to meet your digital design needs (tuned traces, diff pairs…)
- Differential Pairs, Length Matching. Impedance matching, Bus Routing
- Transmission Models with Electrical Characteristics
- Serpentine Track for Length Matching
- Impedance Matching for maximum power transmission
- Delay Matching for Timing especially for DDR Memories
- Layout & Routing with pre and post SI analysis
- Signal Routing
- Design Rule Checking
- Layout Verses Schematic Checking
Hardware Design Power Thermal Analysis Services
- Based on power, environment and materials
- Based on detailed Gerber layout, drills and placement
- Heat from components and DC currents
- Standard FR4-based PCBs, IMS, DCB
- Heat Sink Design
- Hot Spot Analysis
Electronic Manufacturing Services (In Collaboration with our Partners)
- PCB Manufacturing
- SMT (Surface Mount Technology) & Through-Hole
- Consigned or Turnkey with quick turnaround time
- Complex PCB’s
- Ball Grid Array (BGA), X-ray Inspection & Optical
- Inspections
- ROHS Compliant & MIL Grade
- Group B Certifications
- End of Life upgrade with new components
Electronics Hardware Testing & Certifications (In Collaboration with our Partners)
- Radiated Emission Test
- Conducted Emission (CE) Test
- Radiated Immunity (RI) Test
- Electrostatic Discharge (ESD) Test
- EMI/EMC Tests
- Cyclic Temperature & Humidity Test
- Combined Temperature & Vibration Test
- Altitude Test
- Thermal shock test
- Highly Accelerated Life Testing (HALT)
Hardware JEDEC Timing Analysis Services
A shortened time to market, often limits the amount of product testing that can be performed. Microprocessor-based products released with unstable memory may experience only intermittent failures, but even those can lead to a costly recall. To minimize that risk, comprehensive memory timing analysis need to be performed during the design phase of the product.
Net topologies, trace impedances and terminations play an important role in waveform integrity. Trace length, vias and cross talk play an important role in timing. A combined signal integrity analysis and timing analysis environment is needed to guarantee proper function of the DDR interface.
JEDEC timing requirements
In the JESD79 and JESD208 documents, more information can be found about the different DDRx specification.
Thorough knowledge of the different timing parameters within a DDRx device is mandatory for performing detailed accurate timing analysis.
By using high-speed design, analysis and verification techniques early in the design cycle, designers can eliminate layout iterations and ensure that products are marketed on time.